(2015). Resilient traffic light control (Poster). (Original work published 10/2015AD)
. First name
Xenofon
Last name
Kousoukos
(2016). SURE: An Experimentation and Evaluation Testbed for Security and Resilience of CPS (Poster). (Original work published 02/2016AD)
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. (2013). Modeling Time-Triggered Ethernet in SystemC/TLM for Virtual Prototyping of Cyber-Physical Systems. In International Embedded Systems Symposium. Paderborn, Germany: Springer. (Original work published 06/2013AD)
. (2014). Generic Value-Set Analysis on Low-Level Code. In The 5th Analytic Virtual Integration of Cyber-Physical Systems Workshop. Rome, Italy. (Original work published 2014)
. (2015). Precise Multi-Level Inclusive Cache Analysis for WCET Estimation. In 36th IEEE Real-Time Systems Symposium (RTSS). (Original work published 12/2015AD)
. (2015). Top-Down and Bottom-Up Multi-Level Cache Analysis for WCET Estimation. In 21st Real-Time and Embedded Technology and Applications Symposium (RTAS). Seattle, WA, USA. (Original work published 04/2015AD)
. (2015). Improving the Precision of Abstract Interpretation Based Cache Persistence Analysis. In 16th ACM SIGPLAN/SIGBED Conference on Languages, Compilers and Tools for Embedded Systems (LCTES). Portland, OR, USA. (Original work published 06/2015AD)
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